Welcome to the Hot Interconnects Archive
 
Hot Interconnects 9
August 2001
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Hot Interconnects 8
August 2000
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Hot Interconnects 7
August 1999
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Hot Interconnects 8 SIZE
SECTION 1: Routing & Switching I  
A Delay Model for Router Micro-Architectures
81K
A Terabit Switch Fabric with Integrated High-Speed CMOS Transceivers
107K
Reduced Complexity Input Buffered Switches
105K
A Terabit Multi-Service Switch with Quality of Service Support
573K
SECTION 2: Optical Interconnect
High-speed network switch RHiNET-2/SW and its implementation with...
412K
Low-cost WDM transceiver technology for 10-Gigabit Ethernet and beyond
1,376K
SECTION 3: Cluster Interconnects
CLARA: A Cluster based Active Router Architecture
401K
Tree-Saturation Control in the AC 3 Velocity Cluster Interconnect
1,307K
A Cluster Interconnect with Independent Transmission Channels
553K
SECTION 4: System Interconnect
Providing Quality of Service over Infiniband Architecture Fabrics
37K
Novel Intelligent I/O Architecture Eliminating the Bus Bottleneck
1,403K
High Speed, High Bandwidth, External Cache Bus with a Center-Tapped...
204K
JAZiO High Speed I/O Signal Switching Technology
378K
SECTION 5: Network Architecture
Outsourcing Intranet Applications
3,482K
PowerPacket, An 14Mbps Integrated Power Line Network Controller Using OFDM
238K
Virtual Domain Networks
638K
Performance evaluation of a Gigabit Ethernet switch and Myrinet using real...
283K
SECTION 6: Routing and Switching II
Fast incremental updates on Ternary-CAMs for routing lookups and packet ...
173K
Address Processor and Classifier Co-Processors from Silicon Access Networks: ...
44K
A Pipelined Arbitration Technique for Input Buffered Packet Switches
196K