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Keynote

Speaker

Amin M. Vahdat
Distinguished Engineer, Google

Title

Software Defined Network Function Virtualization in Google Cloud Platform

Abstract

Networking underpins storage, distributed computing, and security in the Cloud. Some of the critical requirements for networking in a virtualized environment include flexible isolation and extensible, programmable packet processing. Google has long focused on shared infrastructure among multiple internal customers and services, and in delivering scalable, highly-efficient services to a global population. This talk presents an overview of the design and architectural requirements to bring Google's infrastructure services to external customers with Google Cloud Platform.

Bio

Amin Vahdat is a Distinguished Engineer and Technical Lead for networking at Google. At Google, he focuses on Software Defined Networking, cloud computing, network virtualization, data center and wide area networking. Vahdat has published more than 150 papers in computer systems, with fundamental contributions to cloud computing, data consistency, energy-efficient computing, data center architecture, and optical networking. In the past, he served as the SAIC Professor of Computer Science and Engineering at UC San Diego and the Director of UCSD's Center for Networked Systems. Vahdat received his PhD from UC Berkeley in Computer Science, is an ACM Fellow and a past recipient of the NSF CAREER award, the Alfred P. Sloan Fellowship, and the Duke University David and Janet Vaughn Teaching Award.


Keynote

Speaker

JR Rivers
CEO
Cumulus Networks

Title

Death of the GodBox

Abstract

The maturing landscape in both interconnect technology and consumer expectations is leading a time of innovation in network capacity and utility. Complex systems are being realized by loosely coupling available and emerging open components with relevant, consumable technologies enjoying rapid times to deployment. This talk will highlight the historical precedence and discuss these implications on future system architectures.

Bio

JR Rivers is the co-founder and CEO of Cumulus Networks where he is responsible for the overall strategic direction of the company. JR has been involved with networking since Ethernet only ran on coaxial cables. He's worked on some of the most foundational networking products of their time, from early Network Interface Cards at 3Com through switching and routing products at Cisco. JR's early involvement in home-grown networking at Google and as the VP of System Architecture for Cisco's Unified Computing System both helped fine tune his perspective on networking for the modern datacenter.


Keynote

Speaker

David A. Patterson
Professor
Computer Science
UC Berkeley

Title

Flash and Chips: A Case for Solid-State Warehouse-Scale Computers using Custom Silicon

Abstract

The 3GWSC design emphasis will shift from hardware cost-performance and energy-efficiency to easing application engineering. The reliance on flash memory for long-term storage will create a solid-state server that has both much faster and more consistent storage latency and bandwidth. Custom SoCs connected by optical links will enable servers in a 3GWSC to have better network interfaces and be one- to two-orders of magnitude larger than the servers of today, which should simplify both application development and WSC operations. Thus, a WSC of 2020 will be composed of ~400 3GWSC servers instead of ~100,000 4U servers.

Such a 3GWSC server would certainly be considered a supercomputer, but unlike those for high performance computing, it will be multiprogrammed—for both interactive and batch applications—be fault tolerant so as to be available 24x7, and be tail tolerant to deliver predictable response times.

As a concrete example, we describe FireBox, a research prototype of a 3GWSC server being designed and built in the ASPIRE Lab at UC Berkeley. It will have:

  • 1000 SoCs, each with 100 cores per SoC, or a total of 100,000 cores;
  • 1000 Flash memory modules, each with 100 terabytes per module, or a total of 100 petabytes;
  • Compression and encryption hardware in each SoC, so that data will always be compressed and encrypted when transmitted or stored;
  • 1 terabit/second optical links to each SoC and memory module; and
  • A redundant, high-radix switch to interconnect the optical links.

Before constructing Firebox, we will explore the design space using DIABLO 2 (Datacenter In A Box at LOw cost), which is an FPGA-based simulator that will be able to run the full software stack while simulating FireBox's 1000 SoCs, 1000 Flash memory modules, optical links, and the high radix switch. As both FireBox and DIABLO 2 are ambitious, we are looking for collaborators to help build them.

Bio

David Patterson joined U.C. Berkeley in 1977. He is currently Director of the Par Lab. In the past, he served as Director of the RAD Lab, as Chair of Berkeley's CS Division, Chair of the CRA, and President of the ACM. His most successful projects have been Reduced Instruction Set Computers (RISC), Redundant Arrays of Inexpensive Disks (RAID), and Network of Workstations (NOW). All three research projects helped lead to multibillion dollar industries. This research led to many papers and six books, with the most recent being Engineering Long-Lasting Software: An Agile Approach Using SaaS and Cloud Computing co-authored with Armando Fox. This resulted in more than 30 honors, some shared with friends, including election to the National Academy of Engineering, the National Academy of Sciences, and the Silicon Valley Engineering Hall of Fame. He was named Fellow of the Computer History Museum and both AAAS organizations. From the University of California he won the Outstanding Alumnus Award (UCLA Computer Science Department) and the Distinguished Teaching Award (Berkeley). From the ACM, where as a fellow, he received the ACM Distinguished Service Award, the ACM Karl- strom Outstanding Educator Award, the SIGARCH Eckert Mauchly Award, the SIGMOD Test of Time Award, and the SIGOPS Hall of Fame Award. He is also a fellow at the IEEE, where he received the Johnson Information Storage Award, the Undergraduate Teaching Award, and the Mulligan Education Medal. He shared the IEEE von Neumann Medal and the NEC C&C Prize with John Hennessy, President of Stanford University and co-author of two of his books. Finally, his most recent award is the 2012 Jean-Claude Laprie Award in Dependable Computing from IFIP Working Group 10.4 on Dependable Computing and Fault Tolerance.


Keynote

Speaker

Andy Bechtolsheim
Chief Development Officer
Arista Networks

Title

Large-scale Cloud Networks

Abstract

Software and hardware architectures for very large-scale cloud networks.

Bio

Andy Bechtolsheim is the Founder, Chief Development Officer and Chairman of Arista Networks.

Previously Andy was a Founder and Chief System Architect at Sun Microsystems, where most recently he was responsible for industry standard server architecture. Andy was also a Founder and President of Granite Systems, a Gigabit Ethernet startup acquired by Cisco Systems in 1996. From 1996 until 2003 Andy served as VP/GM of the Gigabit Systems Business Unit at Cisco that developed the very successful Catalyst 4500 family of switches. Andy was also a Founder and President of Kealia, a next generation server company acquired by Sun in 2004.

Andy received an M.S. in Computer Engineering from Carnegie Mellon University in 1976 and was a Ph.D. Student at Stanford University from 1977 until 1982.


Keynote

Speaker

Richard Grzybowski
Executive Director of OpSIS
CTO at Photonic Controls

Title

So... Silicon Photonics... How do I get started?

Abstract

Silicon photonics (SiP) holds great promise as a platform for high-speed interconnects and a wonderful partner for electro-photonic systems! Crucial building blocks have been demonstrated over past decade, including low loss waveguides, waveguide crossings - crucial for implementing higher radix switches - and numerous passive devices for managing wavelength routing, high-speed modulators, edge-couplers and surface normal grating couplers for optical I/O, germanium photodetectors, and even electrically pumped germanium lasers. A number of complementary metal-oxide-semiconductor (CMOS) photonics foundries are available to the community with augmented device libraries that make building SiP systems executing non-trivial functions possible. This said, what can you do with SiP today? How does one get started? What is the current state of the art for EDA support tools? What process development kits (PDKs) are multi-project wafer opportunities are available? How does one get access to all of this? This talk will provide a high level overview, delivering a snapshot of the current state of SiP art and answering some of these questions.

Bio

Dr. Richard Grzybowski is the Executive Director of OpSIS and Chief Technical Officer at Photonic Controls. Prior to this, Dr. Grzybowski was Research Director of Systems Engineering & Program Management at Corning Inc. where he led the systems engineering competency for the Science & Technology organization with special emphasis on early stage programs for keystone components in complex systems. Dr. Grzybowski developed and led an organization of program leaders bringing systems engineering to major projects. Products developed included high performance glass manufacturing, automotive controls, ultra-capacitors, RF distribution systems, optical backplanes (25G), optical switches (40G), and optical transceivers from research to early stage manufacturing. Dr. Grzybowski has authored and been awarded multiple DoD, DARPA and DoE contracts where he has served as program manager and chief systems engineer. These programs have included the delivery of supercomputer optical interconnect products and harsh environment jet engine control systems.

Dr. Grzybowski's research interests include silicon photonics, optical interconnect networks for high performance supercomputers and system applications operating in harsh environments. Dr. Grzybowski has served as Chairman of the Industrial Board of Directors for the Optoelectronics Industry Development Association (OIDA) and is currently Chairman of the Industrial Board of Directors for the MIT Microphotonics Center's Communication Technologies Roadmapping Consortium. Richard holds a Ph.D. from the University of Connecticut, a M.S. from Rensselaer Polytechnic Institute, and a B.S. from Yale University-all in electrical engineering. He also has a diploma in Organ Performance from the Hartt School of Music. He has 23 patents, over 80 publications and is a co-author of the book High Temperature Electronics (CRC Press).

Richard is a senior member of the IEEE and past Secretary of INCOSE and General Chair of the upcoming 2014 IEEE Optical Interconnects Conference.



Keynote

Speaker

John Cioffi
CEO of ASSIA
Professor Emeritus at Stanford University

Title

How "Hot" is your Internet Connection?

Abstract

Quality of consumer experience is increasingly the most meaningful measure of internet prosperity, be such quality measurement by the internet consumer themselves, the provider of "apps" (mobile or browser), the internet/telco service provider, or increasingly even the regulator. As this presentation observes, such quality of experience has been generally strained by increased consumer-internet devices/things and increasing use of video applications. This per-device consumer experience is often not improved by purportedly higher speeds, fiber-to-the-home, but rather by attention to the temporal, location-specific, and statistical performance of the access connection and the consumer's user patterns.

Various successful methods of improved measurement and access-connection optimization are overviewed to demonstrate effective quality of consumer experience improvement on access networks comprised of various amounts of copper, fiber, and unlicensed wireless spectra (Wi-Fi). An application known as Cloudcheck is used as an example of effective measure and improved consumer quality of experience. As such, it becomes possible to measure and increase how "hot" is anyone's internet

Bio

John Cioffi is the CEO and Chairman of the Board of ASSIA. Prior to founding ASSIA in 2003, he served as founder, CTO and vice president of engineering at Amati before its acquisition by Texas Instruments. Dr. Cioffi held a tenured endowed professorship at Stanford University in the Department of Electrical Engineering from 1985 to 2009, where he is now an active Professor Emeritus with limited ongoing research efforts in broadband access. He has published more than 400 papers and holds more than 100 patents. Dr. Cioffi is a member of the United States National Academy of Engineering and an International Fellow of the United Kingdom Royal Society of Engineering. He is a winner of the Economist Computing and Telecommunications Award (2010), the IEEE Alexander Graham Bell Medal (2010), the IEEE Kobayashi Award (2001), and the Marconi Society's Marconi Prize (2006). He currently serves on the board of Alto Beam and on the Marconi Society Board of Trustees. Dr. Cioffi holds a BSEE from the University of Illinois and a PhD in electrical engineering from Stanford University.


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