======================================================================= 25th International Symposium on High Performance Interconnects HotI 2017 ======================================================================= Ericsson Santa Clara, California August 28-30, 2017 Register now at http://www.hoti.org/hoti25/register/ Early registration ends July 31st! ----------------------------------------------------------------------- Advance Program - Hot Interconnects 25 - 2017 ----------------------------------------------------------------------- Come join us for the 25th annual IEEE Symposium on High-Performance Interconnects (Hot Interconnects), to be held August 29-30 (with tutorials on August 28), 2017, generously hosted by Ericsson at the Ericsson Campus, Santa Clara, California. Please visit http://www.hoti.org for more details. Hot Interconnects (HotI) is the premier international forum for researchers and developers of state- of-the-art hardware and software architectures and implementations for interconnection networks of all scales, ranging from multi-core on-chip interconnects to those within systems, clusters, data centers, and clouds. This yearly conference is attended by leaders in industry and academia, creating a wealth of opportunities to interact with individuals at the forefront of this field. There will be four technical paper sessions covering the cutting edge in interconnect research and development on cross-cutting issues spanning computer systems, networking technologies, and communication protocols for high-performance interconnection networks. This conference is directed particularly at new and exciting technology and product innovations in these areas. Building on last year's successful technical program comprising keynotes, technical sessions, and panels on networking for data centers and high-performance computing, the 2017 edition of Hot Interconnects will be located at Ericsson Campus in Santa Clara, CA. This year's conference focuses on HPC Interconnects and their use in traditional and non-traditional applications. We hope you can join us. ***************************** Monday, August 28, 2017 ***************************** ----------------- Morning Tutorials -------------------- Exploiting High-Performance Interconnects to Accelerate Big Data Processing with Hadoop, Spark, Memcached, and gRPC/TensorFlow D. K. Panda & X. Lu, Ohio State University Designing and Developing Performance Portable Network Codes P. Shamis, ARM; Y. Itigin, Mellanox Technologies Developing to Open Fabrics Interfaces libfabric S. Hefty, Intel; James Swaro, Cray ------------------- Afternoon Tutorials ---------------------- High Performance Distributed Deep Learning for Dummies D. K. Panda, A. A. Awan, and H. Subramoni, Ohio State University The TraceR/CODES Framework for Application Simulations on HPC Networks N. Jain, LLNL; M. Mubarak, ANL ----------------------------------------------------------------------- ******************************** Tuesday, August 29, 2017 ******************************** -------------- Keynote 1 RDMA deployments: from cloud computing to machine learning Chuanxiong Guo, MSR -------------------------- +++ Best Papers +++ - Improving Non-Minimal and Adaptive Routing Algorithms in Slim Fly Networks P. Y. Segura, J. Escudero-Sahuquillo, P. J. Garcia, F. J. Quiles, and T. Hoefler - Routing Keys A. Samuel, E. Zahavi, and I. Keslassy - Fast Networks and Slow Memories: A Mechanism for Mitigating Bandwidth Mismatches T. Schneider, M. Flajslik, J. Dinan, T. Hoefler, and K. Underwood +++ Large Scale Networking +++ - WaveLight: A Monolithic Low Latency Silicon-Photonics Communication Platform for the next generation Disaggregated Cloud Data Centers M. Akhter, P. Somogyi, C. Sun, M. Wade, R. Meade, P. Bhargava, S. Lin, and N. Mehta - An FPGA Platform for Hyperscalers F. Abel, J. Weerasinghe, C. Hagleitner, B. Weiss and S. Paredes - Throughput Models of Interconnection Networks: the Good, the Bad, and the Ugly P. Faizian, Md A. Mollah, Md S. Rahman, X. Yuan, S. Pakin, and M. Lang +++ Invited Talk +++ Performance Isolation for Highly Efficient Shared Infrastructure Services Nandita Dukkipati, Google +++ Panel +++ Ethernet vs. HPC: Can the hyperscale ethernet data center handle all workloads? Moderator: Roy Chua, Partner, SDxCentral & Wiretap Ventures Panelists: Yogesh Bhatt, Senior Director, Ecosystem Innovation & Strategy, Ericsson Dave Cohen, Senior Principal Engineer & System Architect, Intel Pete Fiacco, CTO, GigaIO Networks Bithika Khargharia, Former Principal Architect, Extreme Networks Dave Meyer, Chief Scientist, Brocade Ying Zhang, Software Engineer, Facebook +++ Banquet +++ +++ Head Bubba Memorial Cocktail Reception +++ Enjoy the annual Head Bubba Memorial Cocktail Reception at the beautiful Ericsson campus ******************************** Wednesday, August 30, 2017 ******************************** -------------- Keynote 2 Information Transfer in the era of 5G David Allan, Ericsson -------------------------- +++ Optics & Networks for Science +++ - A High Speed Hardware Scheduler for 1000-port Optical Packet Switches to Enable Scalable Data Centers J. Benjamin, P. Watts, A. Funnell, and B. Thomsen - Subchannel Scheduling for Shared Optical On-chip Buses S. Werner, J. Navaridas, and M. Luján - Utilizing HPC Network Technologies in High Energy Physics Experiments J. Schumacher ++ Toplogies, Routing and Process Placement +++ - On the Impact of Routing Algorithms in the Effectiveness of Queuing Schemes in High-Performance Interconnection Networks J. Rocher-Gonzalez, J. Escudero-Sahuquillo, P. J. Garc í a and F. J. Quiles - Placement of Virtual Network Functions in Hybrid Data Center Networks Z. Li and Y. Yang - MPI Process and Network Device Affinitization for Optimal HPC Application Performance R. B. Ganapathi, A. Gopalakrishnan, and R. W. Mcguire +++ Invited Talk +++ Communication at the Speed of Memory Paolo Faraboschi, HP +++ Efficient Network Design & Network Architecture +++ - Characterizing Deep Learning over Big Data (DLoBD) Stacks on RDMA- capable Networks X. Lu, H. Shi, M. H. Javed, R. Biswas, and D. K. Panda - Low-Level Host Software Stack Optimizations to Improve Aggregate Fabric Throughput V. T. Ravi, J. Erwin, P. Sivakumar, C. Tang, J. Xiong, M. Debbage, and R. B. Ganapathi - Userspace RDMA Verbs on Commodity Hardware using DPDK P. MacArthur +++ Awards Presentation +++ Best Student Paper Award ----------------------------------------------------------------------- This is a preliminary program; changes may occur. For the most up-to- the-minute details on presentations, schedules, and registration information, please visit our web site: Website: http://www.hoti.org Early Registration: Ends at 11:59 PM (PDT) on Tuesday August 15th, 2017 Last Day for Refunds: 11:59 PM (PDT) Wednesday August 15, 2017. Press representatives please contact: info@hoti.org Registration fees for Tutorials include tutorial notes, continental breakfast, lunch, and coffee breaks. Registration fees for the conference include web access the conference proceedings. There will be no printed proceedings. The conference registration fee includes a reception on Tuesday night (August 29, 2017), continental breakfasts, lunches and coffee breaks during the two days of the conference (August 29 & 30). ----------------------------------------------------------------------- *** Hot Interconnects Corporate Sponsors *** Host Sponsor Ericsson Platinum Intel Gold Mellanox Silver Lenovo ----------------------------------------------------------------------- *** Organizing Committee *** General Chairs Ada Gavrilovska, Georgia Tech Eitan Zahavi, Mellanox Technical Program Chairs Ryan Grant, Sandia National Laboratories Jitu (Jitendra) Padhye, Microsoft Tutorials Chair James Dinan, Intel Khaled Hamidouche, AMD Publication Chair Luca Valacarenghi, Scuola Superior Sant'Anna Awards Chair Cagla Cakir, ARM Finance Chairs Madeleine Glick, AIM Photonics Academy, MIT Xinyu Que, IBM T.J. Watson Registration Chair Songkrant Muneenaem, Prince of Songkla University Media Chair Torsten Hoefler, ETH Zurich Sponsors Chair Raj Channa, RBC Capital Markets Local Arrangements Chair Krnee Deemark, Ericsson Fabrizio Petrini, Intel Labs Webmaster Charlie Perkins, Huawei Natalia Berezneva ----------------------------------------------------------------------- *** Committee Members *** Don Draper, Oracle Mitchell Gusat, IBM Research Zurich Xin Huang, Comcast Cyriel Minkenberg, IBM Research Zurich ----------------------------------------------------------------------- *** Steering Committee *** Allen Baum, Mill Computing Keren Bergman, Columbia University Raj Channa, RBC Capital Markets Lily Jow, Hewlett Packard Mark Laubach, Broadcom John Lockwood, Algo-Logic Systems Fabrizio Petrini, Intel Labs Dan Pitt, MEF ----------------------------------------------------------------------- *** Sister Conferences *** Hot Chips Cool Chips