Welcome to the 31st iteration of the IEEE Hot Interconnects symposium. HotI’2024 will be held virtually.
CONFERENCE VIDEOS UPLOADED ON HOTI YOUTUBE CHANNEL!
CONFERENCE PROCEEDINGS ARE NOW AVAILABLE!
IEEE Hot Interconnects is the premier international forum for researchers and developers of state-of-the-art hardware and software architectures and implementations for interconnection networks of all scales, ranging from multi-core on-chip interconnects to those within systems clusters, and data centers. Leaders in industry and academia attend the conference to interact with individuals at the forefront of this field.
Our objective is to address the data center networking and the supercomputing communities. We hope you can join us and benefit not only from the content but also from the prime networking opportunities this event always offers.
2024 Conference Theme – Can Interconnects Keep up with AI?
The explosion of AI and workloads related to machine learning and deep learning boggles the mind. Whether in massive data centers, edge locations, automobiles, or consumer appliances, AI stands to improve many tasks useful to people at work or at leisure. The demand for GPUs, DPUs, TPUs, and IPUs taxes the ability of their manufacturers to meet the market demand. Efficient utilization of these xPUs requires high speed and highly scalable interconnects. Whether between xPUs or between an xPU and memory, data transfer can easily become a bottleneck in computing efficiency.
In this edition of IEEE Hot Interconnects, we explore advances in interconnection networks that alleviate this bottleneck. Solutions including optical circuit switching, dense photonic data paths, high-performance fabrics, and more will expand from the specialized applications of HPC to the pervasive applications of AI and in the process will become more affordable. This yearโs HotI will thus be captivatingly relevant.
KEYNOTES
Connectivity for AI Everywhere: The Role of Chiplets
Tony Chan Carusone
CTO, Alphawave Semi and Professor of ECE, University of Toronto
Powering Llama 3: A Sneak-peek into Meta's Massive Infrastructure for Generative AI
Pavan Balaji
Principal Research Scientist and Technical Lead, Meta
Keeping Pace: Micro-Models, Large Language Models, and the Co-Evolution of Chip and Data Center Design in a Rapidly Shifting AI Landscape
Mark Baciak
CTO, NeuralFabric Corp
PANEL
With AI model size doubling every four months, the size of AI compute clusters is growing rapidly to keep up. Traditional data center front-end networks rely on optical interconnect for data movement with Terabits per second of connectivity and have been doubling data rate every 4 years. As the models grow it is also expected that the back-end GPU networks expand beyond the confines of the rack. Optical interconnects will be needed at distances of tens of meters with 10Tb/s data transfer rates and doubling every 2 years will be expected. How should optical interconnects best achieve this bandwidth increase and what is the best performance axis to push next? In this panel discussion we pose the question โ โIs it better to scale with more wavelengths or by adding more fibers?โ Join us to see if any of the panelists can convince you they have the right approach.
Moderator: Dr. Katharine Schmidtke - Co-founder, Eribel Systems
Dr. Dan Kuchta – Research Staff Member, IBM Research Yorktown
Dr. Peter Winzer –Founder & CTO, Nubis Communications
Dr. Rebecca Schaevitzย – Co-founder & Chief Product Officer, MixxTech
Dr. Amit Nagraย – VP & GM, Silicon Photonics Product Division, Intel
Dr. Alan Liuย – Co-founder & CEO, Quintessent
Dr. Bardia Pezeshki – Founder & CEO, Avicena
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