HOT Interconnects 9: Final Program

August 22-24, 2001
Stanford, CA USA

Wednesday August 22	Continental Breakfast: 7:30-8:30am Introductory Remarks: 8:30-8:45am Fred Bauer, General Chair Marwan Krunz and John Lockwood, Program Co-Chairs Keynote: Internet - Hot or Cold 8:45-10:00am Tom Lyon (Founder, Ipsilion) Break: 10:00-10:30am Session 1: Packet Scheduling and Classification: 10:30-Noon Session Chair: Balaji Prabhakar, Stanford University An Efficient Randomized Algorithm for Input-Queued Switch Scheduling: Devavrat Shah, Paolo Giaccone, and Balaji Prabhakar, Stanford University An Implementable Parallel Scheduler for Input-Queued Switches: Paolo Giaccone, Devavrat Shah, Balaji Prabhakar, Stanford University OC-3072 Packet Classification Using BDDs and Pipelined SRAMs: Amit Prakash and Adnan Aziz, University of Texas at Austin Lunch: 12:00-1:30pm Session 2: High-Speed Interconnects: 1:30-3:00pm Session Chair: Fred Bauer, Nokia Synfinity II -- A High-Speed Interconnect with 2GBytes/sec Self-Configurable Physical Link: Yoichi Koyanagi, Takeshi Horie, Takashi Miyoshi, Mitsuo Ishii, Fujitsu Laboratories of America and Hiroshima University Optical Interconnection as an Intellectual Property of a CMOS Library: Takashi Yoshikawa, Ichiro Hatakeyama, Kazunori Miyosi, and Kazuhiko Kurata, NEC Sun Fireplane SMP Interconnect: Alan Charlesworth, Sun Microsystems TCPSwitching: Exposing Circuits to IP: Pablo Molinero-Fernández, Nick McKeown Stanford University Break: 3:00-3:30pm Session 3: Network Attached Storage and Memory: 3:30-5:00pm Session Chair: Daniel Pitt, Nortel Networks Flexible Network Attached Storage using Remote DMA: Jørgen Sværke Hansen, INRIA, France Stonehenge: A Fault-Tolerant Real-Time Network-Attached Storage Device: Tzi-cker Chiueh, Rether Networks High-Speed, High-Bandwidth DRAM Memory Bus with Crosstalk Transfer Logic (XTL) Interface: Hideki Osaka, Toyohiko Komatsu, Susumu Hatano, and Takeshi Wada, Hitachi and Elpida Memory Reducing Routing Table Size using Ternary-CAM: Huan Liu, Stanford University Dinner: 5:30-6:30pm (in courtyard) Panel: The Future of MPLS: 6:30-8:00pm (in courtyard) Session Chair: Bruce Davie (Cisco) Yakov Rekhter (Juniper Networks) Thomas Telkamp (Global Crossing) Simon Crosby (CPlane) Nick McKeown (Stanford University)
Thursday August 23	Continental Breakfast: 7:30-8:30am Invited Session: IPv6: 8:30am-10:00am Session Chair: Bob Hinden (Nokia) Keith Moore (University of Tennessee) Shigeya Suzuki (Omnisci Software, Inc) Shin Miyakawa (NTT Multimedia Communications Laboratory) Tony Hain (Cisco) Break: 10:00-10:30am Session 4: Network Protocol Design and Evaluation: 10:30-Noon Session Chair: Ibrahim Matta, Boston University Deferred Segmentation for Wire-Speed Transmission of Large TCP Frames over Standard Gb/s Ethernet: Hrvoje Bilic, Yitzhak Birk, Igor Chirashnya, Zorik Machulsky, IBM and Israel Inst. of Technology Evaluation of SCSI Over TCP/IP and SCSI Over Fibre Channel Connections: Huseyin Simitci, Chris Malakapalli, Vamsi Gunturu, XIOTech Layered Protocol Wrappers for Internet Packet Processing in Reconfigurable Hardware: Florian Braun, John Lockwood, Marcel Waldvogel, Washington University Quality of Service Guarantee on 802.11 Networks: Srikant Sharma, Kartik Gopalan, Ningning Zhu, Pradipta De, Gang Peng, Rether Networks Lunch: 12:00-1:30pm Session 5: Switch Design and Architecture 1:30-3:00pm Session Chair: John Lockwood, Washington University Analysis of a Statistics Counter Architecture: Devavrat Shah, Sundar Iyer, Balaji Prabhakar, Nick McKeown, Stanford University The Alpha 21364 Network Architecture: Shubhendu S. Mukherjee, Peter Bannon, Steven Lang, Aaron Spink, and David Webb, Compaq RHiNET-3/SW: an 80-Gbit/s high-speed network switch for distributed parallel computing S. Nishimura, T. Kudoh, H. Nishi, J. Yamamoto, R. Ueno, K. Harasawa: S. Fukuda, Y. Shikichi, S. Akutsu, K. Tasho, and H. Amano, Hitachi, Real-World Computing Partnership, Keio Univ, Synergetech The Quadrics Network (QsNet): High-Performance Clustering Technology: Fabrizio Petrini, Wu-chun Feng, and Adolfy Hoisie, Los Alamos National Laboratory Break: 3:00-3:30pm Session 6: Interconnect and Circuit Technologies: 3:30-5:00pm) Session Chair: Nick McKeown, Stanford University Analysis and Avoidance of Cross-talk in On-Chip Buses: Chunjie Duan, Anup Tirumala, Sunil P Khatri, Colorado On the Techniques of Clock Extraction and Oversampling: Henning Braunisch and Raj Nair, Intel A Family of ASIC Devices for Next Generation Distributed Packet Switches with QoS Support for IP and ATM: Fabio M. Chiussi, Alberto Brizio, Andrea Francini, Kevin Grant, Khurram Kazi, Denis Khotimsky, Santosh Krishnan, Sheng Shen, Mohammad Syed, Thomas Wasilewski, Lucent New World Campus Networking: Norival Figueira, Paul Bottorff, and Huiwen Li, Nortel Networks
Friday August 24	Tutorials Tutorial 1: MPLS for Traffic Engineering Bruce Davie, Cisco Systems, Inc. Tutorial 2: Title: InfiniBand Architecture Dhabaleswar K. Panda, The Ohio State University Tutorial 3: Bluetooth Vs. 802.11 Pravin Bhagwat, ReefEdge, Inc. Tutorial 4: Control & Management of Modern Optical Networks Debanjan Saha and Sudipta Sengupta, Tellium, Inc.