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Panelists
Lloyd Dickman
Now involved in a new startup, Lloyd Dickman was previously CTO for
InfiniBand Products at QLogic as well as a Distinguished Architect at
PathScale (company acquired by QLogic, and technology later acquired
by Intel), working on performance oriented interconnects. For many
years, he headed the computer systems architecture and product
planning groups at Amdahl where he directed the architecture and
planning of several successful computer lines. Prior to that, he
headed the computer systems architecture research group at DEC. His
background includes work on high performance networking, instruction
set design, multiprocessor structures, secure computing, virtual
machine architectures, system software and VLSI design. He is a
speaker at SC, ISC and SNW and other technical conferences and has
held leadership roles in ACM SIGARCH, InfiniBand Trade Association and
OpenFabrics Alliance. He was awarded US Patents for contributions in
computer architecture and has held adjunct teaching positions at
Berkeley, Northwestern, San Francisco State, Lowell and Northeastern.
Christian Bell
Christian Bell is a senior architect at Myricom and oversees the
design and productization of solutions that leverage the company's
networking platform for performance-oriented vertical markets.
Through previous roles at HP Labs, Pathscale and QLogic he
participated in research activities in the areas of parallel computing
and continues to split his time between customer facing duties,
product strategy, technical marketing and product development in the
area of network protocols, communications stacks as well as ASIC
design. He holds an MS in Computer Science from the University of
California at Berkeley.
Gilad Shainer
Gilad Shainer is VP of market development at Mellanox technologies
focusing on high performance interconnect solutions. He is the
chairman of the HPC Advisory Council since 2008, and contributed to
the definition of the PCISIG specifications. Mr. Shainer holds several
patents in the area of high-speed interconnects.
Moray McLaren
Moray McLaren is a Distinguished Technologist with HP labs, working in the Intelligent
Infrastructure Lab. His recent research activities have focused on the impact of nanophotonics
on future computer architectures. The two main areas of study are high speed networking, and memory
architectures. Prior to joining HP Labs in January 2007, he was CTO of Quadrics where he led the development
of high speed interconnects for parallel processors. These interconnects were successfully deployed in a number
of supercomputing systems around the world. He holds a number of patents in the area of high speed network interconnect
design. His previous experience includes the development of parallel systems architectures at Meiko, and working on
the development of the "transputer" parallel microprocessor at Inmos. He holds a 1st class honors degree in microelectronics
from the University of Edinburgh.
Greg Thorson
Greg Thorson has been in the HPC industry for 30 years. He started
with Cray Research in 1982 and began designing and architecting
interconnects in 1989 with the T3D. Greg has been fortunate enough to
work on some very interesting machines over the years. These include:
Cray-2, Cray-YMP, Cray-C90, Cray-T3D, Cray-T3E, SGI Origin 2000, SGI
Origin 3000, SGI Altix, SGI UV1, and SGI UV2. In addition, he has had
the opportunity to work with some very bright people along the way and
looks forward to the many interesting developments yet to come.
Keith Underwood
Keith Underwood received his BS and PhD in Computer Engineering from Clemson University,
where he worked on using FPGAs to process the network data stream in Beowulf Clusters.
After Clemson, he went to Sandia National Labs, where his interest turned to "real HPC networks"
as part of the Red Storm (later to become the Cray XT3) project. After working on the network interface
firmware for that system, Keith started research efforts into network interface architectures. As part
of this effort, he was a part of a team that co-designed the next generation of the venerable Portals Network
API with architectural building blocks that could be implemented in hardware. His research into HPC oriented
network architectures continued after he joined Intel Corporation.
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