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FINAL PROGRAM w/LINKS

Papers are linked to their titles.
Please click on '<slides>' for slide presentation.

For Panel Discussion slides,
click on the 'panelist name'.

Available tutorial notes are linked to their respective titles.


Wednesday
August 25, 2004
Thursday
August 26, 2004
Friday
August 27, 2004
7:30 - 8:30 am Continental Breakfast
Registration Open
Check-in / Register on site
Continental Breakfast
Registration Open
Register for Tutorials
Continental Breakfast
Registration Open
Check-In for Tutorial Notes
8:30 - 8:45 am Opening Remarks
Bryan Lyles, General Co-Chair
Anne Watters, General Co-Chair
James Sterbenz, Program Co-Chair
Dimitrios Stiliadis, Program Co- Chair
Opening Remarks
James Sterbenz, Tutorial Co-Chair
Dimitrios Stiliadis, Tutorial Co-Chair
TUTORIAL 2 AM only
Resilient Network Infrastructures for Global Grid Computing

Luca Valcarenghi 

TUTORIAL 4 FULL DAY
High-Speed networking: A Systematic Approach to High-Bandwith Low-Latency Communication

Dr. J. Sterbenz    
8:45 - 9:45 am  Keynote:
Buffers: How we fell in love with them, and why we need a divorce
(abstract)

Dr. Nick McKeown:
Associate Professor of Electrical Engineering and Computer Science, Department of Electrical Engineering, Stanford University
Keynote:
Virtualizing the Net - a strategy for enabling network innovation
(abstract)

Jonathan Turner:
Henry Edwin Sever Professor of Computer Science and Engineering, Washington University in St. Louis
9:45 - 10:15 am Break
10:15 - Noon     SESSION 1
System Level Interconnects
Session Chair: Fabrizio Petrini
SESSION 4
Security and Network Processors
Session Chair: James Sterbenz
 
A Localized Congestion Control Mechanism for PCI Express Advanced Switching Fabrics <slides>
V. Krishnan, D. Mayhew (Stargen)
Worms vs. Perimeters: The Case for Hard-LANS <slides>
N. Weaver, D. Ellis, S. Staniford, V Paxson (ICSI)
Performance Evaluation of Infiniband with PCI Express <slides>
J. Liu, A. Mamidala, A. Vishnu, D. Panda (Ohio State University)
Design of a System for Real-Time Worm Detection <slides>
B. Madhusudan, J. Lockwood (Washington University, St. Louis)
Performance Evaluation of the Cray XI Distributed Shared Memory Architecture <slides>
T. Dunigan, J. Vetter, P. Worley (Oakridge National Labs)
Studying Network Protocol Offload With Emulation: Approach And Preliminary
Results

R. Westerlin, N. Fugier, E. Nordmark, K. Kunze, E. Lemoine (Sun Microsystems)
Noon - 1:30 pm Lunch
1:30 - 3:00 pm    SESSION 2
Packet Classification and Lookup
Session Chair: Bryan Lyles
PANEL DISCUSSION (abstract)
Network Processors: Prospects for Practical Deployment

Moderators: James Sterbenz, University of Massachusetts and Lancaster University, UK; Bryan Lyles


Panelists:
Ásgeir Eiriksson, Chelsio Communications
Steve Klinger, AMCC
Christoph Schuba, Sun Microsystems
Jonathan Turner, Washington University
Raj Yavatkar, Intel
TUTORIAL 3 (PM only)
Internet Infrastructure Security

Dr. G. Manimaran

Efficient Multi-Match Packet Classification and Lookup with TCAM <slides>
F. Yu, R. Katz (U.C. Berkeley)
IPv4 Lookup Table Analysis and Non-Random Generator for IPv6 Tables <slides>
M. Wang, S. Deering, T. Hain, L. Dunn (Cisco Systems)
Efficient Prefix Cache for Network Processors <slides>
M. Akhbarizadeh, M. Nourania (University of Texas, Dallas)
3:00 - 3:30 pm BREAK  
3:00 - 5:00 pm      SESSION 3
Routers and Switches
Session Chair: John Lockwood
SESSION 5
Architectures
Session Chair: Dimitrios Stiliadis
 (Tutorials 1, 3 & 4 continue)
Configuring a Load Balanced-Switch in Hardware <slides>
S. Akerapudi, S-T. Chuang, I. Keslassy, N. Mckeown (Stanford University)
Design of a High-Speed Optical Interconnect for Scalable Shared Memory Multiprocessors <slides>
A. Kodi, A. Louri (University of Arizona)
Designing Packet Buffers with Statistical Guarantees <slides>
G. Shrimali, I Keslassy, N. Mckeown (Stanford University)
Evaluation of a Wireless Enterprise Backbone Network Architecture <slides>
A. Raniwala, T-C. Chiueh (Stony Brook University)
Efficient Multicast on a Terabit Router <slides>
P. Bhargava, S. Krishnan, R. Panigrahy (Cisco Systems)
Closing Remarks
Bryan Lyles, General Co-Chair
5:00 - 6:30 pm Dinner  
6:30 - 8:00 pm PANEL DISCUSSION (abstract)
What are the future trends in high-performance interconnects for
parallel computers?

Moderator: Fabrizio Petrini, Los Alamos National Laboratory

Panelists:
Jose' Moreira, IBM Research
TJ Watson
Thomas Sterling, California Institute of Technology and Nasa Jet Propulsion Laboratory
Jarek Nieplocha, Pacific Northwest National Laboratory
Mark Seager, Lawrence Livermore National Laboratory
Craig Stunkel, IBM
Greg Thorson, SGI
Paul Terry, Cray
Srinidhi Varadarajan, Virginia Tech
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