Technical Paper Session A: Interconnect Standards
Technical Paper Session A: Interconnect Standards
Technical Paper Session A: Interconnect Standards Session Chair: Scott Levy (Sandia National Laboratory) Pipelined and Partitionable Forward Error Correction and Cyclic Redundancy Check Circuitry Implementation for PCI Express® 6.0 Authors: Debendra Das Sharma and Swadesh Choudhary (Intel). Abstract: Pipelined and Partitionable Forward Error Correction and Cyclic Redundancy Check Circuitry Implementation for PCI Express® 6.0.PCI Express® […]